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Race Result Details |
| Racer | Velaryth (velaryth) |
| Race Number | 21 |
| Date | Tue, 21 Jan 2020 21:22:53 |
| Speed |
59 WPM
 Try to beat?
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| Accuracy | 95.4% |
| Rank | 3rd place (out of 5) |
| Opponents | amhaissup (2nd place) |
Text typed:
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In synchronous communications, the sender and receiver must synchronize with one another before data is sent. To maintain clock synchronization over long periods, a special bit-transition pattern is embedded in the digital signal that assists in maintaining the timing between sender and receiver.
— (book)
by Tom Sheldon
(see stats)
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